Various interfaces have been designed to facilitate data exchange between a host computer and peripheral devices, such as keyboards, scanners, and printers. One common bus-based interface is the Universal Serial Bus (USB), which is a polled bus in which the attached peripherals share bus bandwidth through a host-scheduled, token-based protocol. The bus allows peripheral devices to be attached, configured, used, and detached while the host and other peripheral devices are operating.
Hubs provide additional connections to the USB. A hub typically includes an upstream facing port that communicates with the host (or an upstream hub) and one or more downstream facing ports, each of which can communicate with a peripheral device or downstream hub. Because the USB supports various data transfer rates (e.g., low-speed, full-speed, and high-speed), a hub typically includes one or more transaction translators to accommodate speed shifts at the hub. For example, if the hub communicates with the host at high-speed and has a low-speed or full-speed device connected to one of its downstream facing ports, the transaction translator converts special high-speed transactions called split transactions to low-speed or full-speed transactions so that data can be transferred between the host and the hub at high-speed. To accommodate speed shifts at the hub, a transaction translator includes buffers to hold transactions that are in progress. The buffers essentially provide an interface between the high-speed signaling environment and the low-speed and full-speed signaling environments.
Split transactions are scheduled by host software to communicate with low-speed and full-speed devices that are attached to downstream high-speed hubs. The split transactions convey isochronous, interrupt, control, and bulk transfers across the high-speed bus to hubs that have low-speed or full-speed devices attached to their ports. Periodic transactions, such as isochronous transfers with USB speakers or interrupt transfers with USB keyboards, have strict timing requirements. Thus, periodic transactions need to move across the high-speed bus, through the transaction translator, across the low-speed or full-speed bus, back through the transaction translator, and onto the high-speed bus in a timely manner. Non-periodic transactions, such as bulk transfers with USB printers or control transfers for device configuration, do not have strict timing requirements.
For periodic transactions, the host software initiates high-speed split transactions at the appropriate time intervals to help avoid buffer overflows and buffer underflows at the periodic transaction buffers within the transaction translator. The host software traditionally predetermines the dispatch schedule for scheduled periodic traffic destined for transaction translators based on frequency and bandwidth considerations. The predetermined dispatch schedule is typically calculated or recalculated if there is a change to the number of periodic data pipelines in the system, which may interrupt periodic streaming data. An example hardware/software interface to control packet execution is specified in the enhanced host controller interface (EHCI) specification, which uses a frame list tree structure and a set of mask bits to control the start and complete split execution of periodic split packets.